REQ=0, BSY=0, BES=0, BED=0, DONE=0, CE=0
DMA Status Register / Byte Count Register
| BCR | BCR |
| DONE | Transactions Done 0 (0): DMA transfer is not yet complete. Writing a 0 has no effect. 1 (1): DMA transfer completed. Writing a 1 to this bit clears all DMA status bits and should be used in an interrupt service routine to clear the DMA interrupt and error bits. |
| BSY | Busy 0 (0): DMA channel is inactive. Cleared when the DMA has finished the last transaction. 1 (1): BSY is set the first time the channel is enabled after a transfer is initiated. |
| REQ | Request 0 (0): No request is pending or the channel is currently active. Cleared when the channel is selected. 1 (1): The DMA channel has a transfer remaining and the channel is not selected. |
| BED | Bus Error on Destination 0 (0): No bus error occurred. 1 (1): The DMA channel terminated with a bus error during the write portion of a transfer. |
| BES | Bus Error on Source 0 (0): No bus error occurred. 1 (1): The DMA channel terminated with a bus error during the read portion of a transfer. |
| CE | Configuration Error 0 (0): No configuration error exists. 1 (1): A configuration error has occurred. |